UniPCemu build 2019/06/15 17:39 is now live!

The latest updates for UniPCemu are now available on itch.io! These include CPU improvements, various hardware improvements and emulator speed optimizations. The SLIP server has also been improved to be multi-user(up to 256 clients simultaneously).

Windows 3.x MS-DOS prompts now also work correctly, as does the 386 enhanced mode of Windows 3.x(except Windows 3.0). So does win32s (according to it's Freecell program).

One improvement on using the latest SDL2 library from source control is that UniPCemu now can run in the background on Android! Although it can still be terminated due to memory constraints by the Android device, but it can keep running in the background when it's in standby now.

Common emulator framework updates:

• Fixed 64-bit fopen handling of appending to files by replacing it with overwriting and adding logic instead in the fopen64 module itself.
• Implemented the new Block on Pause hint for compatible SDL2 builds.
•  Fixed PSP clock speed detection.
•  Fixed sound recording buffer overflows to discard any unprocessable samples.
• Made the TCP server and client capable of running multiple connections at the same time(with the first connection reserved for legacy support).
• Fixed zalloc to be able to allocate more memory items when requested.
• Fixed the TCP support to properly use the maximum number of connections without wrapping around.
• Improved handling of TCP server being connected to when not ready to receive a connection, according to settings.
• Improved TCP connection and server behaviour.
• Made unavailable TCP servers(due to no connections being available) stop the server entirely until a client is available again.
• Improved automatic TCP server starting/stopping depending on the number of available connections.
• Fixed SDL and PSP compiler issues.

UniPCemu updates:

• Improved faulting the single-step exception to also restore it's post-instruction state properly.
• Improved faults restoring the CPL and segment descriptors for the restored segment registers as well before any changes were made from the last commit point.
• Improved documentation on TR and it's descriptor being restored, as well as handling of it's descriptor in a compatible way with the other descriptors that are being restored.
• Improved OPL2 phase to real conversion.
• Optimized BIU PIQ filling memory accesses in IPS clocking mode.
• Optimized memory limit checking.
• Optimized memory address patching and memory hole emulation.
• Implemented lazy segment register backups, only backupping when loading said segment register with a new value that can be undone.
• Fixed data segment invalidation of retf/iret to properly update the precalcs.
• Added CPU mode copy of the mode for the current instruction for emulator debugging purposes(breakpoints etc.) when it might have been modified partway through the instruction.
• Added a copy of the most recent segment value and isJMPorCALL parameter passed to segmentWritten for emulator debugger purposes.
• Removed unused ModR/M SIB EBX code.
• Improved wrapping of 80386+ A0-A3 opcodes.
• Made 8086+ XLAT compatible with the 80386 version.
• Made IRET instruction execution linear, with more a simple return-if-done way of execution(early-out algorithm instead of conditional algorithm being nested).
• Unmasking NMI isn't dependent on the instruction finishing completely without errors or not(undocumented behaviour).
• IRET in V86 mode with NT flag being set returns to the parent task instead of enforcing V86 documented behaviour(allowing the NT flag to not be lost when it's set during an IRET).
• CALL gate selector is taken as it's stored inside the descriptor, not taking the caller's RPL instead of it's own specified RPL in the descriptor.
• Made the ATAPI sector count register a bit more compatible with ATA devices(being writable).
• Improved ATA/ATAPI handling of resetting properly keeping the drive busy.
• Optimized memory location patching to be precalculated.
• Fixed unmapping the memory mapped cache when updating the maximum memory size and related precalcs.
• Fixed and optimized non-memory hole memory accesses.
• Optimized RAM memory accesses further.
• Optimized the RAM memory accesses even further.
• More optimization of memory accesses and memory holes, merging checks and minimizing the costs.
• Fixed memory hole missing return statement.
• Fixed invalid patch address handling.
• Optimized RAM accesses further by combining the mapped cache flag with the address that's mapped.
• NT flag has lower priority than the V86 flag during an IRET instruction.
• Fixed missing Set typematic rate/delay timeout handling.
• Don't receive the escape F0 byte of the scancode set release of a key on the 8042 output port.
• Optimized the MMU initialization free memory check to be more simple for the same effect, but in a faster way(without needing to check for all memory to use).
• Improved debugging of interrupts to handle properly when hardware interrupts start, initializing timings correctly when preparing the new instruction to execute.
• Don't clear an empty 8042 output buffer when it's empty and not filling it with anything. Leave the last read value in place.
• Fixed ModR/M added offset when running the 32-bit BT instruction.
• ide.c: Improved PCI BAR ROM bits.
• ide.c: Fixed the error in the code.
• Fixed 80386-style INTO/IRET to behave the same in 32-bit and 16-bit versions.
• Fixed 80386+ F1 INT1 opcode to be properly used.
• Improved SGDT/SIDT to fill the highest byte in 16-bit mode with 0xFF(80286) or 0x00(80386).
• Fixed 80286/80386 SIDT syntax error.
• Improved segment register protection checks during PUSH and POP of said segment registers to properly use 32-bit operand size when specified for the instruction(reading/writing 16-bit and increasing/decreasing ESP by the operand size).
• Restored the MOVZX and MOVSX instructions to use Gv,Ew for opcode B7 and BF.
• Improved touching segment descriptors only when a full load is completed.
• LAR, LSL, VERR and VERW don't actually touch the segment(set it's Accessed bit).
• Removed unused result variable of the LOADDESCRIPTOR function.
• Improved committing of CPL and CPU modes to be a bit more correct if affected by changing CPU modes.
• RETF CS just checks for RPL instead of CPL.
• Fixed privilege check compilation issue.
• Privilege checks and stack returns are identical for RETF and IRET.
• Fixed PG bit requiring PE bit to only apply to CR0 and not to the other Control Registers.
• Improved INT3 to behave like normal interrupts(except IOPL).
• Improved missing reverse segment pointer detection to detect the LDTR.
• Fixed writing check during writing 32-bit values through the BIU to properly check for changes.
• Improved privilege rule for conforming interrupt handlers: DPL>CPL isn't allowed for conforming interrupt handlers(lowering privileges through interrupts).
• Improved handling of V86 calling 16-bit interrupt gates.
• Improved task switching to make sense for CS CPL checks.
• Made all SS type checks into #GP faults, but all other SS checks into #SF faults, according to 80286 task switching specification.
• Faults on SS during task switching throws #SS faults instead of #TS faults.
• Non-conforming code has the same privilege rules as data when loaded into a data segment, but it's special rules still apply during a load into the code segment.
• Improved real mode and Virtual 8086 mode CALL pushing data on the stack to properly check the stack before pushing, instead of blindly pushing the data on the stack.
• Updated the Android Studio project to the latest version.
• Improved CALLF protection rules.
• Improved GRP5 stack checks to be performed together with the other stack checks.
• Modified 16-bit pushes to write the full 32-bits when using a 32-bit operand size, 16-bit pushes otherwise.
• Optimized instruction fetching by using seperate physical memory map information caching for instruction reads.
• Fixed 32-bit segment pushes to check the stack properly.
• Improved 16-bit V86 mode interrupts to push 16-bit values on the stack.
• Improved modr/m pushing of (E)SP to be using compatible stacks on all CPUs, as documented.
• Fixed the variable name of PUSH (E)SP's modr/m variant.
• Fixed SP push parameters.
• Simplified interrupt and trap gate naming.
• Made 32-bit interrupt and trap gates invalid on the 80286(invalid values).
• Implemented the remainder of the non-FPU Pentium instructions.
• Fixed Pentium CMPXCHG8B to allow the LOCK-prefix.
• Updated the BIOS menu to report the improved Pentium emulation.
• Improved Pentium CPUID to report all implemented features.
• Fixed Pentium BIOS message to report the CPU correctly.
• Implemented the LOCK prefix status to be used in the documented way.
• Implemented bus locking for the DMA transfers.
• The LOCK prefix is always used with the XCHG instruction referring to memory.
• Fixed the CPU_setprefix to be allowed to be called for setting the LOCK-prefix.
• Implemented an interrupt errorcode of -4 for handling VME V86 IVT-style interrupts with paging used.
• Improved direct access functionality in the CPU request functions to support segdesc -1 to be using paging(-2 will use direct memory access instead, for allowing paging accesses). -3 will use special ES real-mode calculation without it's descriptor.
• Improved TSS IOPB limit checking.
• Implemented a function for the Pentium emulation to read the Interrupt Redirection bitmap, just like the I/O Port Bitmap.
• Improved the I/O map base to be allowed to be at the end of the TSS when it's fully within the limits of the TSS (since it stops the byte before the IOPB base after all).
• Implemented the Virtual 8086 mode extensions of the Pentium processor.
• Implemented the Protected Mode Virtual Interrupts (PVI) on the Pentium processor emulation.
• Fixed missing jumptable entries for the VME Pentium opcodes.
• Fixed the Pentium CPUID to report a correct VME support instead of FPU support.
• Implemented missing flag behaviour on 32-bit PUSHFD on the Pentium CPU emulation.
• Fixed Pentium VME V86 enhanced mode interrupt to use the Virtual Interrupt Flag instead of the Interrupt Flag.
• Virtualized the pushed FLAGS Interrupt Flag to be properly Virtualized when executing a VME INT instruction using the IVT instead of pushing the real Interrupt Flag.
• Fixed the getcpumode function in the interrupt handler to use it's proper lowercase function name.
• IOPL pushed on the stack of VME software interrupts using the IVT push an IOPL of 3 instead of the actual IOPL.
• Enabled the Pentium CPU to be selectable in the settings menu again, since it's now properly implemented.
• Optimized non-VPI detection on Pentium emulation.
• Further optimized the Pentium STI/CLI instructions.
• Fixed various 0F00 instructions to be handled properly in V86 mode.
• Fixed DMA starting to properly apply a new state when detecting DRQ, properly advancing to S0 instead of S1 or further when detecting multiple DRQ lines being high.
• Improved DMA to take the bus on T1 properly instead of the cycle before it.
• Stop blocking DMA properly during multiple DMA transfers.
• Fixed BIU and DMA blocking compiler issues.
• Made intervals larger than 2 seconds into 1 microsecond, preventing too large loops.
• Fixed x86 REP pending with IPS clocking mode and continuing to use the current prefetch buffer properly while repeating instructions.
• Fixed the new CPU_RealResetOP to compile properly.
• Fixed REPeated instruction to properly reset the BIU PIQ(not clear it when it isn't needed).
• Fixed REPeating instructions to properly restart the opcode handler, instead of executing dummy handlers due to not initializing the EU state handler properly.
• Improved debugger detection of running instructions vs repeating instructions and <HLT> states to stop logging the instructions themselves(but still log it's BIU accesses).
• The #SS(selector) fault only happen during task switches loading SS and when the present bit is cleared while loading SS. All other cases act normally and throw #GP(selector) or #TS(selector).
• Stack Switching does cause #TS to occur instead of #SS with the task switching flag set.
• Improved CPUID for the Pentium to properly identify as a Pentium(P5), but without a FPU.
• Improved 80486 CPUID to properly set unused bitflags to zero, as they're currently unknown.
• multitasking.c: Special TSS handling for the stack segment.
• #TS fault during other faults than Present-bit being zero for the SS segment loading during task switching.
• Fixed compiler warning of unused SS original value label.
• Fixed 80286+ CMPS and SCAS timings to only be counting it's cycles once, as it's supposed to.
• Improved documentation in the SETTINGS.INI file for the newly supported Pentium CPU.
• Added some improved debugging support for page faults.
• Fixed CGA/MDA waitstates and address wrapping to occur for reads too, instead of just for writes.
• Improved and generalized stack checks during various instructions.
• Generalized error code check for pushing error codes on the stack.
• Fixed the PIC to generate the correct interrupt vector number, according to the 8259A documentation.
• Improved ATAPI ready state and ROM registers until an ATAPI command is issued.
• Improved ATAPI special ROM STATUS register when working as a ROM ATA status register.Improved NEG to affect the carry flag based on it's input, not it's output, as is documented.
• Improved ATA channel for debugging.
• Improved the ATA SRST to reset the active channel correctly too.
• Revert "- Improved NEG to affect the carry flag based on it's input, not it's output, as is documented."
• NEG acts as a fused XOR x,x SUB x,r/m; So literally 0-x, setting flags and CF accordingly.
• README.md: Improved documentation on building for SDL2 2.0.9 and below.
• Improved ATA/ATAPI BSY setting when documented to, according to the ATA-1 specification's description of the STATUS REGISTER.
• Improved ATA/ATAPI reset to properly reset the 8-bit transfers flag accordingly.
• ATA Initialize Drive Parameters is supposed to assert INTRQ, according to ATA specification, chapter 10.3 Non-data commands.
• Fixed ATA read command being finished actually not setting BSY when raising it's interrupt(ATA-1 chapter 10.1).
• Improved read multiple and write multiple to behave more correctly and abort invalid LBA addresses on the next transferred block.
• Improved IDE read/write sector(s)/multiple to properly use the case where the sector count is zero, thus 256 sectors.
• Fixed IDE base timing to be 10us.
• Improved the ATA Master drive diagnostics to take 2.5% longer than the slave.
• IRQ timeout busy has no effect on DRDY.
• Added a bit of information for detecting running ATA read sector transfers vs finishing transfers.
• Fixed ATA_readsector compiler warning.
• Improved REPNZ INS/OUTS to be handled as REP INS/OUTS instead.
• Improved x86 IRET(D) to properly check the return task against segmentation, paging and fault correctly.
• Fixed the missing IRET Nested Task TSS paging check.
• Improved blocking of interrupts when supposed to be inhabited.
• Trapped and allowing interrupts to execute doesn't affect the debugger.
• Busy ATA channel blocks DRQ.
• Fixed MinGW compiler warnings.
• Improved the modem buffers to clear properly when disconnecting from a client/server.
• Made the modem and SLIP server compatible with the new multiple TCP connection method.
• Updated the SLIP server to be able to handle multiple connections at once(up to 256).
• Made the SLIP server able to use up to 256 user accounts(with their own static IP configuration).
• Improved modem listening when not ready, dial when already connected and hangup to properly hang up the connected client/server as required(throwing it on-hook).
• Improved default connection ID and not connectable state to not unnessecarily reset the server.
• During Autoanswer mode, the ring counter is reset once a connection is made.
• Improved the modem command mode to check the value before writing it to the buffer, in particular when the buffer is full, handle it correctly(instead of ignoring it altogether).
• Applied the modem escape sequence to normal command mode as well.
• Made sure that a escape code with guard time always properly resets to an empty command buffer.
• Don't allow sending a NULL-terminator in the middle of a string when the modem is in Command mode.
• Cleaned up unused variable for non-SLIP server builds.
• Modified the modem's TCP server to support the new TCP server method of starting and stopping the server properly and compile.
• Updated the common emulator framework to the latest commit.