UniPCemu build 2022/04/07 22:49 is now live!

UniPCemu:

• Two new architectures are emulated: i450gx (with different southbridges, either SIO.A or PCEB/ESC. It's able to run in i440fx compatiblity mode as well.) and SiS85C496/7 with up to 8GB and 256MB memory.
• The serial connection without packet server on Windows now supports a connection from a TCP port to a physical or emulated serial port (direct serial connection) to a Dosbox-compatible nullmodem connection.
• Serial connections and the modem connection for all TCP connections now supports having their own speed in baud configured using a setting.
• New flash chips are emulated for the new architectures.
• Improved memory caching to use seperate prefetch caches and widened to 64-bits.
• Updated Android gradle to 7.0.4.
• Updated Android project to the latest version.
• Improved CPU mode updates.
• Implemented 4 CPUs support on supporting architectures.
• Implemented APIC #GP fault raising.
• Improved debugger CPU interrupt display and logging.
• Improved debugger screen layout.
• Improved debugger displayed registers and caches.
• Added interrupts/traps/exceptions to the display for the debugger screen output.
• Improved settings menu during debugging.
• Improved debugger button support.
• Implemented DMA high page address registers for 32-bit address support.
• Centralized BIU/MMU cache invalidation.
• Improved RESET line support.
• Improved threading support.
• Optimized CPU debugging support.
• Improved APIC timing.
• Implemented ATA/ATAPI PCI bus mastering.
• Fully implemented ATA/ATAPI PCI configuration space emulation.
• Implemented proper PCI IRQ mapping support.
• Improved ELCR support.
• Improved ATAPI emulation to be more accurate.
• Improved ATA/ATAPI IRQ support and mapping in both compatibility and PCI mode.
• Implemented more ATA channels on the SiS85C496/7 chipsets.
• Improved ATA/ATAPI BSY handling during port writes.
• Implemented libserial support for physical serial support on supported platforms (Windows/linux).
• Improved 32-bit paging checks.
• Doubled memory cache line block alignment to 128-bit.
• No CR4 register exists on 80486 CPUs.
• Optimized invalid modr/m with LOCK prefix.
• Optimized CPU TLBs at the cost of 1MB+2KB of RAM.
• Fixed TLB invalidation issues.
• PCI now uses manual mapping of device locations on the bus, with multiple bus support.
• Improved PCI I/O support.
• Implemented PCIRST# on a bus support.
• Improved ELCR vs legacy PIC support.
• Improved APIC bus priority.
• Improved APIC remote IRR support.
• Improved APIC timer emulation.
• Improved APIC delivery modes.
• Improved APIC command register emulation.
• Improved APIC on non-supported CPUs.
• Improved APIC bus delivery methods.
• Improved APIC errors.
• Improved APIC I/O handling.
• Improved APIC and PIC IRQ support and extended IRQ mapping.
• Optimized protected mode debugger registers handling.
• Improved UART transfer frequency emulation accuracy using DLAB.
• Optimized video card memory mapping.
• Optimized CPU breakpoints.
• Improved CPU breakpoint handling.
• Optimized the debugger breakpoints to  not update for V86 mode switches.
• Fixed modem default mode to be set correctly.
• Improved SRST and ATAPI reset effect on non-present drives.
• Improved ATAPI response to SRST.
• ATAPI: Report not ready when receiving an ATA Execute Device Diagnostic command.
• Improved and simplified ATA PCI and non-PCI port detection.
• Implemented missing 16-bit and 32-bit onboard ATA detection.
• Improved ATAPI SRST response to only keep defined bits and clearing the reset of the status register.
• Improved ATAPI response to SRST.
• Fixed ATA onboard control registers base address.
• Made the ATA/ATAPI PCIRST# reset and set(when needed) the command register.
• Made the ATA/ATAPI command register bit 0 reset the connected drives using the reset pin when set.
• Properly register the PCIRST# handlers for registered PCI configuration spaces.
• Perform PCIRST# on poweron on the root bus.
• Don't special-case the i430fx PCIRST# handling compared to i440fx and higher.
• Improved i430fx/i440fx/i450gx added registers during PCIRST#.
• Cleaned up ATA/ATAPI controller unused variables.
• Improved unsupported BARs depending on the used architecture.
• Improved PCI IDE unused BARs.
• Centralized PCI IDE unused BAR ROM loading.
• Implemented i430fx/i440fx/i450gx onboard ATA channels.
• Made the i430fx/i440fx able to configure the onboard IDE channels.
• i440fx doesn't use the PCI IDE BARs.
• Improved i430fx/i440fx onboard ATA channel mapping. The i430fx chipset still has inversed mapping.
• Force i430fx/i440fx to use all BARs in PCI mode, with legacy interrupts.
• Split the IDE channels into an onboard(2,3) PCI(0) channel and PCI card(0,1) PCI(1) channel.
• Fixed various issues with the PCI channel split.
• Fixed i430fx/i440fx invalid device ID being used for initializing the PCI configuration space.
• Fixed addressing issues with the onboard PCI configuration space.
• Improved onboard PCI IDE support.
• Fixed PCI transferring checks to work correctly again.
• Properly re-register the ATA PCI IDE channel.
• Fixed finishing PCI transactions to properly use the finishing device ID instead of it's device number.
• Restored i430fx legacy BARs.
• Improved PCI IDE-only memory clearing during PCIRST#.
• Improved i4x0 interrupt pin to be properly present when needed.
• Properly register the native PCI IDE controller.
• Fixed onboard channel resetting ATA drives properly.
• Improved onboard ATA primary/secondary channels to be i440fx only.
• Fixed issue with onboard IDE forcing PCI mode.
• Improved PCI IDE to start in PCI mode.
• Fixed channels and PCI mode setting.
• Fixed ATA 16/32-bit data port disabling when required to.
• Fixed the PCI BARs to be supporting the second set of channels.
• Implemented the second PCI controller mapping from PCI address space.
• Made the PCI controller mapping use common functions for read and write accesses.
• Gave the onboard IDE channels priority over the PCI IDE channels.
• Generalized PCI BAR support.
• Made the PCI IDE use the generalized PCI BAR support.
• Restored the PCI IDE to be ATA-compatible again during powerup.
• Made the ATA port addresses mapping use the correct controllers that belong to them.
• Properly apply primary and secondary channel being disabled when programmed to do so, not affecting the PCI IDE controller.
• Allow setting the i430fx IDE BARs to non-zero values.
• IDE: Made INTA masking PCI channel specific.
• Extended IDE bus mastering and bus priorities to multiple controllers.
• Make the proper last active bus master check for activity first, allowing both channels to check for activity if needed as they should (properly doing both if needed, instead of just one channel).
• Disable PCI BARs on the legacy mode of the PCI IDE device again.
• Forced the i430fx/i440fx onboard IDE registers into PCI mode with legacy interrupts.
• Improved ATAPI IDENTIFY PACKET DEVICE command to become properly busy for a little bit when completing the command.
• Enabled the onboard IDE channels.
• Moved the i430fx PCI IDE channels to the onboard channels.
• Made the IRQ to use more configurable on the i430fx.
• Made the onboard i430fx IRQs active.
• Improved ATA handling of onboard IRQs.
• Implemented the modem Analogue Loopback testing mode without the loopback active.
• Implemented the modem loopback testing mode.
• Improved modem AT&T commands to give ERROR if a test mode isn't supported.
• Improved modem AT&T commands to support the test mode timeout.
• Made ATA read/write sector and seeking take the last sector or specified head (for seek commands) into account when timing it's result.
• Made the ATA errors take a bit of time instead of being instant.
• Fixed drive identification data initialization for the onboard IDE drives.
• Fixed PCI BAR address compiler warnings.
• Improved IRQ management for all IDE drives during SRST.
• Improved ATA disk seek and sector commands to properly spend some time depending on the seeked track.
• Made the i4x0 variants not cascade the ROMs onto their own variants anymore. They now use i4x0 instead of i430fx.
• Improved the CPU handling the WP bit correctly now.
• Updated SDL2 on Windows to version 2.0.20.

Common emulator framework:

• Added missing PSP SwapLE64 support.
• Added support for SDL_SwapLE64 when not supported by the SDL headers.
• Implemented 128-bit and 256-bit shift functionality.
• Added the headers for 128-bit and 256-bit shifts.
• Prevent pressed key PSP-style input to the emulated machine when the debugger is using said buttons.
• Disable joystick input when a debugger is running.
• Added support for thread holder locks.
• Improved restoring the window to recreate textures if they are missing.
• Implemented the UniPCemu nowpbios command-line parameter.
• Made all command-line parameters available at the same time, given in any order.
• Made memory allocations able to use 64-bit sizes and reporting as much memory as is supported by the detected architecture.
• Seperate freemem limits to 8GB for allocated blocks and 32/64-bits for allocated memory itself, depending on the architecture.
• Fixed the parameter of the emu_raise_resetline function in the header for UniPCemu.
• Improved texture updates.

These improvements and bugfixes mean that now the following things are way improved:

• Newer NT versions from 4.0 onwards are now able to boot properly.
• The 85c496/7 architecture is added as a lower specification PCI-compatible architecture.
• The i450gx architecture is added with multiple southbridges available. i440fx emulation is also supported for compatibility.
• Multiprocessing is improved, so multiple processors can now be properly used.
• The CPU paging unit has been fixed on CPUs from the 80486 and newer. It's also optimized to be much faster.
• Windows (and the Linux ports as well) builds can now use a physical COM port to map it onto a TCP/IP port.
• All serial ports supported can be configured for custom baud speeds. Software running inside UniPCemu can now properly change speeds in Dosbox-compatible direct cable connections over TCP.
• The debugger screen and functionality has been improved with various new debugging display features.
• IDE devices now work better.